Sr Staff Engineer, Analog Design/PMIC - Cambridge, UK

Overview

Qualcomm Technologies International Ltd

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

PLEASE NOTE THIS ROLE WILL REQUIRE 5 DAYS PER WEEK ONSITE IN OUR CAMBRIDGE OFFICE

Job Overview - Dept Description and Job Duties

The role of a Staff Engineer, Analogue Design is to act as a key contributor to the design, implementation and verification of the complex power-management blocks and subsystems of Qualcomm’s range of connectivity, Voice and Music chips. In addition to contributing to the specification, design and verification of the blocks using appropriate tools, a Staff Engineer will contribute to the macro level architectures and the definition of new features and market driven enhancements for Qualcomm’s chips.

Key Responsibilities

• Acts as a key contributor in a complex environment;
• Definition of the architecture for the complex Power-management blocks, plan and execute the development of the blocks and providing the necessary documentation to different departments for the characterization of the block.
• Responsible for the delivering the fully verified blocks and may get involved in the verification of power-management subsystems within the Analogue section of a chip;
• Solves complex problems in a tightly constrained environment;
• Fully competent in Analogue design for complex sub-cells and small subsystems;
• Keeps abreast of new developments and is technical expert in the design of analogue sub-cells;
• Ensures quality of the solution; works with macro lead to ensure timely delivery of subsystems

Minimum Qualifications

Bachelor's degree in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
OR
Master's degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.

Minimum Experience

Candidate should have:

• 5+ year of work experience
• Design experience of Key Power management IPs like SMPS, LDOs
• Good understanding of the analog design.
• Ability to coordinate with different groups and define the requirements
• Experience in the design of various power-management blocks

Preferred Experience

• Fully competent in Analogue design and verification techniques
• Fully competent in the use of Cadence and Mentor analogue design and verification tools
• Knowledge of Matlab and other system design tools for defining the architecture and specification of the blocks is a plus.
• Good team player.
• Good interpersonal and communication skills

*References to a particular number of years experience are for indicative purposes only. Applications from candidates with equivalent experience will be considered, provided that the candidate can demonstrate an ability to fulfill the principal duties of the role and possesses the required competencies.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

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Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.