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Physical Design Engineer Co-op

Cisco

Company : Cisco

Location : Maynard, MA, 01754

Posted Date : 10 October 2025

Job Type : Full Time, Intern

Category : Information Design & Documentation

Occupation : Design Engineer

Job Details

Cisco is a global technology leader renowned for its groundbreaking products developed in short timeframes. The company is committed to supporting the increasing demands of hybrid work environments and ensuring reliable, high-capacity network connections. This commitment drives its focus on developing cutting-edge products utilizing the latest submicron technologies.

Job Description: Physical Design Engineer Co-op

This co-op opportunity offers the chance to work on Cisco’s elite optical communication products, contributing to the development and optimization of ASIC designs. The role involves various tasks focused on physical implementation and optimization, providing comprehensive experience in ASIC design.

Responsibilities:

  1. Collaborate with Front-End Teams: Gain a thorough understanding of the design architecture to ensure optimal physical implementation.
  2. Gate Level Netlist Synthesis: Participate in the physical synthesis process.
  3. Physical Implementation: Contribute to floorplanning, placement, clock tree synthesis (CTS), and routing.
  4. Optimization: Optimize design for power, performance, and area.
  5. Static Timing Analysis and Signoff: Analyze and ensure timing closure for the design.
  6. Physical Verification and Signoff: Conduct thorough verification to meet signoff requirements.
  7. EMIR Analysis and Signoff: Analyze and signoff the design for electromagnetic interference and radiation.

Requirements:

  • Education: Currently enrolled in a full-time undergraduate program in computer science, electrical engineering, or a related field.
  • On-site Presence: Must be able to work on-site in Maynard, MA two days a week.
  • Technical Skills:
    • Knowledge of the design cycle from RTL to GDSII.
    • Understanding of Static Timing Analysis, timing closure, and design constraints.
    • Proficiency in block level synthesis, place and route, timing closure, PnR, and signoff tools.

Preferred Qualifications:

  • Interest in VLSI Design: Strong interest in ASIC physical design and verification.
  • Deep Submicron CMOS Technologies: Knowledge and experience with deep submicron CMOS technologies.
  • Scripting Experience: Experience with scripting languages such as Perl, TCL, Python, or shell.
  • Problem-Solving: Analytical and creative problem-solving skills.
  • Internship Experience: Previous internship experience in related fields is a plus.

Culture and Values:

Cisco fosters a diverse and inclusive culture where individuals are encouraged to be themselves while working together as a team. The company emphasizes innovation, creativity, learning from mistakes, and giving back to the community.

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