Technical Lead Manager, Silicon Product Development, Google Cloud

Technical Lead Manager, Silicon Product Development, Google Cloud

Overview

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

Responsibilities

• Lead Post Silicon Engineering Activities from DFT requirements, including New Product Introduction (NPI), System Level testing, and HVM (including Yields analysis and Return Merchandise Authorization (RMA)/Failure Analysis (FA)).
• Lead a team to develop silicon product test hardware and software, silicon data analytics, and system level testing.
• Work closely with NPI-HVM team on manufacturing management, tracking, quality, and cost optimization.
• Develop a robust NPI team to facilitate the execution of multiple products. Prioritize the creation of a systematic NPI Test Program strategy that includes clear definition, efficient execution, and ongoing refinement.
• Build and track high performance IC test and characterization flows for PVT, signal and power integrity characterization, System correlation, and participate in silicon debug, Electrical Failure Analysis (EFA), and Physical Failure Analysis (PFA).

Minimum qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in IC product development or test engineering, and manufacturing (i.e., characterization, qualification, bring-up, yield improvement, and debug).
• 6 years of experience in people management, developing employees.
• Experience building test program and HVM floor engineering support/management.
• Experience working with vendors.

Preferred qualifications

• Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
• Experience in wafer probe card, ATE hardware, and managing suppliers on execution of test hardware development and bring-up.
• Experience in test engineering, DFT, test hardware, and test program development (e.g., Teradyne UltraFlex, Advantest 93k platforms).
• Experience in programming/scripting (e.g., C and C++, Python, or Perl).
• Knowledge of probability and statistical fundamentals for data analysis and process control design.

Compensation

The US base salary range for this full-time position is $227,000-$320,000 plus bonus, equity, and benefits. Salary ranges are determined by role, level, and location. Individual pay is determined by location and factors including job-related skills, experience, and education. Recruiter can share the specific salary range for your location during the hiring process. Compensation details reflect base salary and do not include bonus, equity, or benefits. Learn more about benefits at Google.

Equal Employment Opportunity

Google is proud to be an equal opportunity workplace and an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See Google's EEO Policy and EEO is the Law. If you have a disability or special need that requires accommodation, please let us know by completing our Accommodations for Applicants form.