Hardware Engineer - FPGA

Fpga Engineer

The Common Hardware Group (CHG) delivers silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers of various sizes, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service providers, enterprise networks, and data centers with a fully unified routing and switching portfolio.

The FPGA Engineer will get to work with cutting edge, next generation routers powering AI buildout. You will be responsible for taking networking system requirements, mapping them into functional blocks for FPGA implementation, working with the cross functional team to address development requirements, participate in validation of the system, and release to manufacturing. Working on High-End Routing designs for the ASR8000 routers and a member of the FPGA team that designs control path FPGAs for the various boards. The Engineer will interface with diagnostics, software, board design, manufacturing and hardware qualification teams to ensure smooth delivery of the project. Strong analytical skills and experience to deal with the complexity of system hardware and software interactions. In addition, having experience in FPGA design and can write RTL code, run simulations, address timing and other constraints, then generate programming files.

Bachelor's Degree in Electrical Engineering or relevant degree and 5+ years of related experience.

Experience with FPGA or ASIC development from specification to production.

Experience with Verilog/System Verilog or RTL coding.

Experience with FPGA devices and tools.

Master's Degree in Electrical Engineering or relevant degree and 3+ years of related experience.

Experience with UVM and/or VMM Verification methodology.

Experience with high-speed design debug.

Experience with advanced microprocessor-based design.

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