Hardware Architecture Modeling Engineer, Google Cloud

Company : Google
Location : Sunnyvale, CA, 94086
Posted Date : 15 September 2025
Job Type : Other
Category : Architecture
Occupation : Architecture
Job Details
Hardware Architecture Modeling Engineer, Google Cloud
In this role, you'll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You'll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
As a Machine Learning (ML) Hardware Architecture Modeling and Co-design Engineer, you will work with hardware and software architects to model, analyze, and define next-generation TPUs.
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world. We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud's Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
Minimum Qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience in computer architecture performance analysis, or a PhD degree in lieu of industry experience.
- Experience in developing software systems in C++ or Python.
Preferred Qualifications:
- Experience in applying computer architecture principles to solve open-ended problems.
- Experience in analyzing workload performance and creating benchmarks.
- Experience in hardware and software co-design.
- Experience developing in Python.
- Knowledge of design of digital logic at the Register Transfer Level (RTL) using Verilog.
- Knowledge of processor design or accelerator designs and mapping Machine Learning (ML) models to hardware architectures.
Responsibilities:
- Lead Machine Learning workload characterization, benchmarking, and hardware-software co-design.
- Conduct performance and power analyses and quantitatively evaluate proposals.
- Develop architectural and micro architectural models to enable quantitative analysis.
- Collaborate with partners in hardware design, software, compiler, Machine Learning (ML) model and research teams for hardware/software co-design.
- Propose capabilities and next-generation TPUs and chip roadmap, and contribute to TPU chip specs.
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